N1076B 56 Gbaud Electrical CDR

Instrument
DCA-M
Standard

N1076B optical/electrical clock recovery takes an incoming data or clock signal, locks onto it using a phase-locked loop (PLL) circuit, and outputs a recovered clock. The recovered clock can be used as a timing reference for oscilloscopes (like the 86100D and N1090A, N1092-series, and N1094-series DCA-M oscilloscopes) or BERTS. The N1076B works with both NRZ and PAM4 signals. With optional external hardware equalizers (such as provided in the phase matching kits), you can perform "closed eye" measurements. For installation, safety, and regulatory information, refer to the N107X-series user's guide which can be downloaded from www.keysight.com. Clock recovery is often required for:

  • Standards compliance
  • Clock-less devices
  • Excessive clock-to-data delay such as is introduced by long spools of fiber-optic cable.

This module requires FlexDCA firmware version A.05.80 or above.

Front Panel Items
Indicator Description
Displays the FlexDCA extended module slot where the N1076B is installed.
Locked light is green when the N1076B is locked on the input signal.
Data In – and Data In + port These are the single-ended and differential data inputs from which to recover the clock. Use a splitter to divert part of the data signal to clock recovery and part of the signal to the oscilloscope's channel input.
Recovered Clock Out port Connect this output to the oscilloscope's clock or trigger input. Output frequency range is dependent on option.
Aux Clock Out port An auxilliary recovered clock output from 8 GHz to 16 GHz.

Rear Panel

Rear Panel Items
Port Description
USB connector Use the provided USB cable to connect this port to an 86100D's or PC's USB connector.
LINE power on/off switch Use this switch to turn the N1076B on and off.
LINE power input Refer to the N107X-series user's guide for LINE power specifications. This book can be downloaded from www.keysight.com.

Block Diagram

Delay Matching

When using an N1076B, your test setup may require that additional delay be added. This can occur if the following items are true:

  • An 86100D-PTB (Internal Precision Time Base) is used.
  • Low frequency jitter in the order of a few 100 fs is present on the signal.

Added delay is not required if your test setup is using an 86107A precision timebase module or an 86108A/B precision waveform analyzer module. A delay-line assembly that adds the required amount of delay is provided in the N1027A-76A electrical clock recovery phase matching kit. This delay-line assembly attaches to the 86100D's rear panel. For instructions on installing the delay line and drawings of example test setups, download the N107X-seris user's guide from keysight.com.

Automatic Relock

If the clock recovery module loses lock, the trigger becomes asynchronous with the data and the instrument will not display a correctly triggered waveform. By default, when lock is lost, the instrument automatically tries to re-establish lock. Automatic relocking is most helpful when probing a device under test. You can turn off or on automatic relocking from the Clock Recovery setup dialog. Loss of lock, or false lock, conditions may be caused by unusual patterns with a large amount of consecutive 1's or 0's. If the module loses lock during any procedure or measurement, reestablish lock and then repeat the procedure or measurement. For example, if lock is lost while saving a pattern waveform to a file, the data stored in the file will be corrupt.

Locking on the Data Rate

When using the module, you must specify the symbol rate of the clock to be recovered and lock the module on the symbol rate. Under two conditions, the module may lock on a symbol rate other than the specified rate. In the first condition, lock can occur if the entered symbol rate is an integer multiple of the actual symbol rate of the signal. The second condition occurs because the acquisition range is broad (greater than ±5000 PPM). This makes it possible for the module to lock on a signal that is higher or lower than the selected value. For example, if you select a 2.48832 GBd symbol rate but the signal is actually 2.5 GBd, the module may still lock on the signal.

Loop Bandwidth and Jitter

When measuring jitter relative to the recovered clock, jitter that is present on both the data and the recovered clock can not be detected by the instrument. Jitter that is within the clock recovery module's loop bandwidth appears on the recovered clock. Jitter that is outside of the loop bandwidth does not appear on the recovered clock and can be detected on the data. Specific jitter frequencies in the vicinity of the loop bandwidth may appear amplified or attenuated due to the scope timebase delay and clock recovery group delay. The electrical through-path does not have a delay line. Compensation can be made, by adding an electrical cable between the electrical output and the vertical channel. However, this may affect signal quality.

If the display shows a clock recovery lock lost status message, clock recovery cannot be established on the signal. Make sure that your signal is attached with a power level greater than the minimum (see the specifications) and that the symbol rate is set correctly to within the specified acquisition range.

Features at a Glance

For detailed information, refer to the N1076B specifications help.

Feature Partial Specifications
Input date rate
Option 264 125 MBd to 64 GBd
Option 232 125 MBd to 32 GBd
Option 216 125 MBd to 16 GBd
Input Voltage Levels (min/max)
Option 216 ±2.2 Vpp (maximum)
Options 232 and 264 ±500 mVpp (maximum)
Minimum input level to acquire lock Rate dependent
Recovered Clock Out
Option 264 64 GHz, maximum
Option 232 125 MHz to 32 GHz, full-rate clock
Option 216 50 MHz to 16 GHz
Aux Clock Out 8 GHz to 16 GHz
Jitter spectrum analysis (Option JSA) Compatible
RF Connectors
Electrical Data Input (+/–) 2.92 mm (f)
Recovered Clock Output 2.92 mm (f)
Aux Clock Output 2.92 mm (f)

Options

Module Options
Option Description
216 125 Mbaud to 16 Gbaud
232 125 Mbaud to 32 Gbaud
264 125 Mbaud to 64 Gbaud
EVA Integrated, variable equalizer.
JSA Jitter Spectrum Analysis and Clock Recovery Emulation.
Accessory Options
Option Description
2P1 Microwave pick-off tee with 1.0 mm connectors. Matched pair. Reorder N1027A-2P1.
2P2 Microwave pick-off tee with 2.4 mm connectors. Matched pair. Reorder N1027A-2P2.
2P3 Microwave pick-off tee with 2.92 mm connectors. Matched pair. Reorder N1027A-2P3.
2P8 Microwave pick-off tee with 1.85 mm connectors. Matched pair. Reorder N1027A-2P8.
EQ3 Equalizer, 2.92 (m) to 2.92 (f), 3 dB. Reorder N1027A-EQ3.
EQ6 Equalizer, 2.92 (m) to 2.92 (f), 6 dB. Reorder N1027A-EQ6.
EQ9 Equalizer, 2.92 (m) to 2.92 (f), 9 dB. Reorder N1027A-EQ9.
CR1 Electrical clock-recovery phase matching kit
DC1 Delay cable assembly, 18.2 ns
1CM Rack-mount kit for a single N107X-series DCA-M
1CN Rack-mount kit for two N107X-series DCA-Ms (mounted side-by-side)